利盈娱乐(中国)创新平台有限公司

利盈娱乐教你正(zheng)确选(xuan)择MOS管(guan)重要的(de)一个(ge)环节，MOS管(guan)选(xuan)择不好(hao)就可能(neng)(neng)影响到整(zheng)个(ge)电路(lu)的(de)功率使用，会造(zao)成雪崩等原(yuan)因，了解(jie)不同的(de)MOS管(guan)部件的(de)细微差别及不同开关电路(lu)中的(de)参数，我(wo)们(men)(men)能(neng)(neng)够帮助工程师避免诸多(duo)问(wen)题，下面我(wo)们(men)(men)来(lai)学(xue)习下MOS管(guan)的(de)正(zheng)确的(de)选(xuan)择方法。

第一步(bu)：选用P沟道(dao)还是N沟道(dao)

利盈娱乐(le)半导体为企业选用(yong)正(zheng)确元器(qi)件的第一(yi)步是决定采用(yong)N沟(gou)道还是P沟(gou)道MOS管(guan)(guan)。在(zai)典(dian)型的功率应(ying)用(yong)中(zhong)，当一(yi)个MOS管(guan)(guan)接(jie)地，而负载(zai)连接(jie)到(dao)干线电压上时(shi)，该MOS管(guan)(guan)就(jiu)构成了低压侧开关(guan)(guan)。在(zai)低压侧开关(guan)(guan)中(zhong)，应(ying)采用(yong)N沟(gou)道MOS管(guan)(guan)，这是出(chu)于对关(guan)(guan)闭或导通器(qi)件所需电压的考虑(lv)。当MOS管(guan)(guan)连接(jie)到(dao)总线及(ji)负载(zai)接(jie)地时(shi)，就(jiu)要用(yong)高压侧开关(guan)(guan)。通常会在(zai)这个拓扑中(zhong)采用(yong)P沟(gou)道MOS管(guan)(guan)，这也是出(chu)于对电压驱动的考虑(lv)。

要选(xuan)择合适的(de)应(ying)用(yong)(yong)元器(qi)件(jian)(jian)，必(bi)须确(que)(que)定(ding)(ding)驱(qu)动器(qi)件(jian)(jian)所需的(de)电(dian)(dian)(dian)(dian)(dian)(dian)压(ya)(ya)，以及在设(she)计(ji)中最(zui)(zui)简(jian)易执(zhi)行的(de)方法(fa)。下一步是确(que)(que)定(ding)(ding)所需的(de)额(e)(e)(e)定(ding)(ding)电(dian)(dian)(dian)(dian)(dian)(dian)压(ya)(ya)，或(huo)者器(qi)件(jian)(jian)所能承受(shou)的(de)最(zui)(zui)大(da)(da)(da)电(dian)(dian)(dian)(dian)(dian)(dian)压(ya)(ya)。额(e)(e)(e)定(ding)(ding)电(dian)(dian)(dian)(dian)(dian)(dian)压(ya)(ya)越大(da)(da)(da)，器(qi)件(jian)(jian)的(de)成本就(jiu)越高。根据实践经验，额(e)(e)(e)定(ding)(ding)电(dian)(dian)(dian)(dian)(dian)(dian)压(ya)(ya)应(ying)当大(da)(da)(da)于干线电(dian)(dian)(dian)(dian)(dian)(dian)压(ya)(ya)或(huo)总线电(dian)(dian)(dian)(dian)(dian)(dian)压(ya)(ya)。这样(yang)才能提供足够的(de)保护，使MOS管不(bu)会失效。就(jiu)选(xuan)择MOS管而(er)言，必(bi)须确(que)(que)定(ding)(ding)漏极至源极间(jian)可能承受(shou)的(de)最(zui)(zui)大(da)(da)(da)电(dian)(dian)(dian)(dian)(dian)(dian)压(ya)(ya)，即最(zui)(zui)大(da)(da)(da)VDS。知(zhi)道MOS管能承受(shou)的(de)最(zui)(zui)大(da)(da)(da)电(dian)(dian)(dian)(dian)(dian)(dian)压(ya)(ya)会随温(wen)(wen)度而(er)变(bian)化(hua)(hua)这点十(shi)分重要。设(she)计(ji)人(ren)员必(bi)须在整(zheng)个工(gong)(gong)作温(wen)(wen)度范围(wei)内测(ce)试电(dian)(dian)(dian)(dian)(dian)(dian)压(ya)(ya)的(de)变(bian)化(hua)(hua)范围(wei)。额(e)(e)(e)定(ding)(ding)电(dian)(dian)(dian)(dian)(dian)(dian)压(ya)(ya)必(bi)须有足够的(de)余量覆(fu)盖这个变(bian)化(hua)(hua)范围(wei)，确(que)(que)保电(dian)(dian)(dian)(dian)(dian)(dian)路不(bu)会失效。设(she)计(ji)工(gong)(gong)程师需要考虑的(de)其他(ta)安全(quan)因素包括由开关电(dian)(dian)(dian)(dian)(dian)(dian)子设(she)备（如(ru)电(dian)(dian)(dian)(dian)(dian)(dian)机或(huo)变(bian)压(ya)(ya)器(qi)）诱(you)发的(de)电(dian)(dian)(dian)(dian)(dian)(dian)压(ya)(ya)瞬变(bian)。不(bu)同应(ying)用(yong)(yong)的(de)额(e)(e)(e)定(ding)(ding)电(dian)(dian)(dian)(dian)(dian)(dian)压(ya)(ya)也有所不(bu)同；通(tong)常，便携式(shi)设(she)备为(wei)20V、FPGA电(dian)(dian)(dian)(dian)(dian)(dian)源为(wei)20～30V、85～220VAC应(ying)用(yong)(yong)为(wei)450～600V。

第二步(bu)：确(que)定(ding)额(e)定(ding)电流

选择(ze)MOS管的额(e)定(ding)电(dian)(dian)流(liu)。视电(dian)(dian)路结(jie)构(gou)而定(ding)，该额(e)定(ding)电(dian)(dian)流(liu)应是负载(zai)在(zai)所有情况(kuang)下能够承(cheng)受(shou)的最(zui)大(da)电(dian)(dian)流(liu)。与电(dian)(dian)压的情况(kuang)相似，设计人员必须确保(bao)所选的MOS管能承(cheng)受(shou)这个额(e)定(ding)电(dian)(dian)流(liu)，即使在(zai)系统(tong)产生尖(jian)(jian)峰(feng)电(dian)(dian)流(liu)时。两个考虑的电(dian)(dian)流(liu)情况(kuang)是连(lian)续模式和脉冲尖(jian)(jian)峰(feng)。在(zai)连(lian)续导通模式下，MOS管处于稳(wen)态，此(ci)时电(dian)(dian)流(liu)连(lian)续通过器件。脉冲尖(jian)(jian)峰(feng)是指有大(da)量电(dian)(dian)涌（或尖(jian)(jian)峰(feng)电(dian)(dian)流(liu)）流(liu)过器件。一旦确定(ding)了这些(xie)条(tiao)件下的最(zui)大(da)电(dian)(dian)流(liu)，只需直接选择(ze)能承(cheng)受(shou)这个最(zui)大(da)电(dian)(dian)流(liu)的器件便可。

 选(xuan)好额定电(dian)(dian)(dian)(dian)流后，还必须计(ji)(ji)算(suan)导通损(sun)耗(hao)。在实际情况下，MOS管(guan)(guan)并(bing)不(bu)是(shi)理想的(de)(de)(de)(de)(de)器件(jian)(jian)，因为(wei)在导电(dian)(dian)(dian)(dian)过程中会(hui)有电(dian)(dian)(dian)(dian)能损(sun)耗(hao)，这(zhei)称之为(wei)导通损(sun)耗(hao)。MOS管(guan)(guan)在“导通”时就像(xiang)一个可(ke)变电(dian)(dian)(dian)(dian)阻(zu)(zu)，由器件(jian)(jian)的(de)(de)(de)(de)(de)RDS（ON）所确定，并(bing)随温度(du)而显著变化。器件(jian)(jian)的(de)(de)(de)(de)(de)功率(lv)耗(hao)损(sun)可(ke)由Iload2×RDS（ON）计(ji)(ji)算(suan)，由于(yu)导通电(dian)(dian)(dian)(dian)阻(zu)(zu)随温度(du)变化，因此功率(lv)耗(hao)损(sun)也会(hui)随之按比例变化。对MOS管(guan)(guan)施加的(de)(de)(de)(de)(de)电(dian)(dian)(dian)(dian)压VGS越高(gao)，RDS（ON）就会(hui)越小(xiao)；反(fan)之RDS（ON）就会(hui)越高(gao)。对系(xi)统设计(ji)(ji)人员来说(shuo)，这(zhei)就是(shi)取(qu)决于(yu)系(xi)统电(dian)(dian)(dian)(dian)压而需要折中权(quan)衡的(de)(de)(de)(de)(de)地方。对便(bian)携式设计(ji)(ji)来说(shuo)，采用较低的(de)(de)(de)(de)(de)电(dian)(dian)(dian)(dian)压比较容易（较为(wei)普遍），而对于(yu)工业设计(ji)(ji)，可(ke)采用较高(gao)的(de)(de)(de)(de)(de)电(dian)(dian)(dian)(dian)压。注意RDS（ON）电(dian)(dian)(dian)(dian)阻(zu)(zu)会(hui)随着电(dian)(dian)(dian)(dian)流轻微上升。关于(yu)RDS（ON）电(dian)(dian)(dian)(dian)阻(zu)(zu)的(de)(de)(de)(de)(de)各种电(dian)(dian)(dian)(dian)气参数变化可(ke)在制(zhi)造商提供的(de)(de)(de)(de)(de)技术资料(liao)表中查到。

技(ji)术(shu)(shu)(shu)(shu)对(dui)器(qi)件的特(te)性有着重(zhong)大影响，因为有些(xie)技(ji)术(shu)(shu)(shu)(shu)在(zai)提高最大VDS时往往会(hui)使RDS（ON）增(zeng)大。对(dui)于这样的技(ji)术(shu)(shu)(shu)(shu)，如果(guo)打算(suan)降(jiang)低VDS和(he)RDS（ON），那么就得增(zeng)加晶片(pian)尺寸，从而增(zeng)加与(yu)之配套的封装(zhuang)尺寸及相关(guan)的开发(fa)成本。业界现有好几(ji)种试(shi)图控制晶片(pian)尺寸增(zeng)加的技(ji)术(shu)(shu)(shu)(shu)，其中最主要的是沟(gou)道和(he)电(dian)荷(he)平衡技(ji)术(shu)(shu)(shu)(shu)。

在沟道技术(shu)中，晶(jing)片中嵌入了(le)一(yi)个深沟，通常是(shi)为(wei)低(di)电(dian)(dian)压(ya)(ya)预留的(de)(de)(de)(de)，用于(yu)降低(di)导(dao)通电(dian)(dian)阻RDS（ON）。为(wei)了(le)减(jian)少最(zui)大VDS对RDS（ON）的(de)(de)(de)(de)影响，开(kai)发(fa)过(guo)程中采用了(le)外延生长柱/蚀刻柱工艺(yi)。例如，飞兆半导(dao)体开(kai)发(fa)了(le)称为(wei)SupeRFET的(de)(de)(de)(de)技术(shu)，针对RDS（ON）的(de)(de)(de)(de)降低(di)而(er)增(zeng)加了(le)额(e)外的(de)(de)(de)(de)制造(zao)步骤。这(zhei)种对RDS（ON）的(de)(de)(de)(de)关(guan)注十分重(zhong)要，因为(wei)当标准MOSFET的(de)(de)(de)(de)击(ji)穿电(dian)(dian)压(ya)(ya)升高时，RDS（ON）会随之呈指(zhi)数(shu)(shu)级增(zeng)加，并且导(dao)致晶(jing)片尺(chi)(chi)寸(cun)增(zeng)大。SuperFET工艺(yi)将RDS（ON）与晶(jing)片尺(chi)(chi)寸(cun)间的(de)(de)(de)(de)指(zhi)数(shu)(shu)关(guan)系变(bian)成(cheng)了(le)线性关(guan)系。这(zhei)样，SuperFET器件便(bian)可(ke)在小晶(jing)片尺(chi)(chi)寸(cun)，甚至在击(ji)穿电(dian)(dian)压(ya)(ya)达到600V的(de)(de)(de)(de)情况下，实现理想的(de)(de)(de)(de)低(di)RDS（ON）。结果是(shi)晶(jing)片尺(chi)(chi)寸(cun)可(ke)减(jian)小达35%。而(er)对于(yu)最(zui)终用户来(lai)说，这(zhei)意(yi)味着封装(zhuang)尺(chi)(chi)寸(cun)的(de)(de)(de)(de)大幅减(jian)小。

第三(san)步：确定散热要求

选择MOS管(guan)的(de)(de)(de)(de)下一(yi)步(bu)是计算(suan)系统的(de)(de)(de)(de)散热要(yao)求(qiu)。设计人员必须考虑两种不(bu)同的(de)(de)(de)(de)情(qing)况(kuang)，即最坏情(qing)况(kuang)和真(zhen)实情(qing)况(kuang)。建议采用针对最坏情(qing)况(kuang)的(de)(de)(de)(de)计算(suan)结(jie)果，因为这(zhei)个结(jie)果提(ti)供更大(da)(da)的(de)(de)(de)(de)安全余量，能确保(bao)系统不(bu)会失(shi)效。在MOS管(guan)的(de)(de)(de)(de)资料(liao)表上还(hai)有一(yi)些需要(yao)注(zhu)意的(de)(de)(de)(de)测量数(shu)据；比如封装器件(jian)的(de)(de)(de)(de)半导体结(jie)与环境之间的(de)(de)(de)(de)热阻，以(yi)及最大(da)(da)的(de)(de)(de)(de)结(jie)温。

元器件的(de)(de)结(jie)温(wen)等于(yu)最(zui)大环境温(wen)度(du)加上热阻(zu)与功率(lv)(lv)耗散(san)的(de)(de)乘(cheng)积(ji)（结(jie)温(wen)=最(zui)大环境温(wen)度(du)+［热阻(zu)×功率(lv)(lv)耗散(san)］）。根(gen)据这个方程可(ke)解出(chu)系统的(de)(de)最(zui)大功率(lv)(lv)耗散(san)，即(ji)按(an)定(ding)义相(xiang)等于(yu)I2×RDS（ON）。由于(yu)设(she)计(ji)人(ren)员已确定(ding)将(jiang)要(yao)通过器件的(de)(de)最(zui)大电流，因此可(ke)以计(ji)算出(chu)不同温(wen)度(du)下的(de)(de)RDS（ON）。值得(de)注意的(de)(de)是(shi)，在处(chu)理简单热模(mo)型时，设(she)计(ji)人(ren)员还必须考虑半导体结(jie)/器件外壳(qiao)及外壳(qiao)/环境的(de)(de)热容(rong)量；即(ji)要(yao)求印(yin)刷(shua)电路板和封装不会立即(ji)升温(wen)。

雪(xue)崩击穿是(shi)指半导体器(qi)(qi)件(jian)(jian)上的(de)(de)(de)反向电(dian)(dian)(dian)压(ya)(ya)超过最(zui)大(da)(da)值，并形成强电(dian)(dian)(dian)场使(shi)器(qi)(qi)件(jian)(jian)内电(dian)(dian)(dian)流(liu)增(zeng)加。该(gai)电(dian)(dian)(dian)流(liu)将(jiang)耗(hao)散功率，使(shi)器(qi)(qi)件(jian)(jian)的(de)(de)(de)温度(du)升高，而(er)且有(you)(you)可能(neng)(neng)损坏器(qi)(qi)件(jian)(jian)。半导体公司都会对(dui)器(qi)(qi)件(jian)(jian)进行雪(xue)崩测试，计(ji)(ji)算(suan)其雪(xue)崩电(dian)(dian)(dian)压(ya)(ya)，或对(dui)器(qi)(qi)件(jian)(jian)的(de)(de)(de)稳(wen)健(jian)性进行测试。计(ji)(ji)算(suan)额定(ding)雪(xue)崩电(dian)(dian)(dian)压(ya)(ya)有(you)(you)两(liang)种(zhong)方法；一是(shi)统计(ji)(ji)法，另一是(shi)热(re)计(ji)(ji)算(suan)。而(er)热(re)计(ji)(ji)算(suan)因为(wei)较为(wei)实用而(er)得到广泛采用。除计(ji)(ji)算(suan)外，技术(shu)对(dui)雪(xue)崩效应也有(you)(you)很大(da)(da)影响。例如，晶片(pian)尺(chi)寸的(de)(de)(de)增(zeng)加会提高抗雪(xue)崩能(neng)(neng)力(li)，最(zui)终提高器(qi)(qi)件(jian)(jian)的(de)(de)(de)稳(wen)健(jian)性。对(dui)最(zui)终用户而(er)言，这(zhei)意味着要在(zai)系统中(zhong)采用更大(da)(da)的(de)(de)(de)封装件(jian)(jian)。

第四步：开关性(xing)能

选择MOS管的(de)(de)(de)最后(hou)一步是(shi)决定MOS管的(de)(de)(de)开(kai)(kai)(kai)(kai)(kai)关(guan)(guan)(guan)(guan)(guan)(guan)性能(neng)(neng)。影响(xiang)开(kai)(kai)(kai)(kai)(kai)关(guan)(guan)(guan)(guan)(guan)(guan)性能(neng)(neng)的(de)(de)(de)参(can)数有很多，但最重要的(de)(de)(de)是(shi)栅(zha)(zha)极/漏(lou)极、栅(zha)(zha)极/ 源(yuan)极及漏(lou)极/源(yuan)极电(dian)容(rong)。这些电(dian)容(rong)会在器(qi)件(jian)中(zhong)(zhong)(zhong)产生(sheng)开(kai)(kai)(kai)(kai)(kai)关(guan)(guan)(guan)(guan)(guan)(guan)损(sun)耗，因为在每(mei)次开(kai)(kai)(kai)(kai)(kai)关(guan)(guan)(guan)(guan)(guan)(guan)时(shi)都要对它们充电(dian)。MOS管的(de)(de)(de)开(kai)(kai)(kai)(kai)(kai)关(guan)(guan)(guan)(guan)(guan)(guan)速(su)度因此被降低，器(qi)件(jian)效率(lv)也下(xia)降。为计算(suan)开(kai)(kai)(kai)(kai)(kai)关(guan)(guan)(guan)(guan)(guan)(guan)过(guo)程(cheng)中(zhong)(zhong)(zhong)器(qi)件(jian)的(de)(de)(de)总(zong)损(sun)耗，设计人员必须计算(suan)开(kai)(kai)(kai)(kai)(kai)通过(guo)程(cheng)中(zhong)(zhong)(zhong)的(de)(de)(de)损(sun)耗（Eon）和(he)关(guan)(guan)(guan)(guan)(guan)(guan)闭过(guo)程(cheng)中(zhong)(zhong)(zhong)的(de)(de)(de)损(sun)耗（Eoff）。MOSFET开(kai)(kai)(kai)(kai)(kai)关(guan)(guan)(guan)(guan)(guan)(guan)的(de)(de)(de)总(zong)功率(lv)可用如下(xia)方程(cheng)表达(da)：Psw=（Eon+Eoff）×开(kai)(kai)(kai)(kai)(kai)关(guan)(guan)(guan)(guan)(guan)(guan)频率(lv)。而栅(zha)(zha)极电(dian)荷（Qgd）对开(kai)(kai)(kai)(kai)(kai)关(guan)(guan)(guan)(guan)(guan)(guan)性能(neng)(neng)的(de)(de)(de)影响(xiang)最大。

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