MOS管如何分(fen)析(xi)电路工(gong)作原理
信(xin)息来源:本站 日(ri)期:2017-04-27
PMOS的特性,Vgs小于一定的值就会导通,适合用于源极接VCC时的情况(高端驱动)。但是,固然PMOS可以很便当地用作高端驱动,但由于导通电阻大,价钱贵,交流种类少等缘由,在高端驱动中,通常还是运用NMOS。电路分析如下:pmos的开启条件是VGS电压为负压,并且电压的绝对值大于最低开启电压,普通小功率的PMOS管的最小开启电压为0.7V左右,假定电池充溢电,电压为4.2V,VGS=-4.2V,PMOS是导通的(de)(de)(de)(de),电(dian)(dian)(dian)(dian)(dian)(dian)(dian)路是没(mei)(mei)有(you)问(wen)题的(de)(de)(de)(de)。当(dang)5V电(dian)(dian)(dian)(dian)(dian)(dian)(dian)压(ya)时,G极(ji)(ji)的(de)(de)(de)(de)电(dian)(dian)(dian)(dian)(dian)(dian)(dian)压(ya)为(wei)(wei)5V,S极(ji)(ji)的(de)(de)(de)(de)电(dian)(dian)(dian)(dian)(dian)(dian)(dian)压(ya)为(wei)(wei)5VV-二极(ji)(ji)管压(ya)降(jiang)(jiang)(0.5左(zuo)右(you))=4.5V,PMOS管关(guan)段,当(dang)没(mei)(mei)有(you)5V电(dian)(dian)(dian)(dian)(dian)(dian)(dian)压(ya)时,G极(ji)(ji)电(dian)(dian)(dian)(dian)(dian)(dian)(dian)压(ya)下拉为(wei)(wei)0V,S极(ji)(ji)的(de)(de)(de)(de)电(dian)(dian)(dian)(dian)(dian)(dian)(dian)压(ya)为(wei)(wei)电(dian)(dian)(dian)(dian)(dian)(dian)(dian)池电(dian)(dian)(dian)(dian)(dian)(dian)(dian)压(ya)(假定电(dian)(dian)(dian)(dian)(dian)(dian)(dian)池充溢电(dian)(dian)(dian)(dian)(dian)(dian)(dian)4.2V)-MOS管未导通二极(ji)(ji)管压(ya)降(jiang)(jiang)(0.5V)=3.7,这样PMOS就导通,二极(ji)(ji)管压(ya)降(jiang)(jiang)就没(mei)(mei)有(you)了这样VGS=-4.2V.PMOS管导通对负(fu)载供(gong)电(dian)(dian)(dian)(dian)(dian)(dian)(dian)。在(zai)这里(li)用(yong)一个肖(xiao)特(te)基(ji)二极(ji)(ji)管(SS12)也(ye)可(ke)以处置这个问(wen)题,不过就是有(you)0.3V左(zuo)右(you)的(de)(de)(de)(de)电(dian)(dian)(dian)(dian)(dian)(dian)(dian)压(ya)降(jiang)(jiang)。这里(li)运用(yong)PMOS管,PMOS管完好导通,内(nei)阻(zu)(zu)比较小,优与肖(xiao)特(te)基(ji),几乎没(mei)(mei)有(you)压(ya)降(jiang)(jiang)。不过下拉电(dian)(dian)(dian)(dian)(dian)(dian)(dian)阻(zu)(zu)运用(yong)的(de)(de)(de)(de)有(you)点大,驱动PMOS不需(xu)求(qiu)电(dian)(dian)(dian)(dian)(dian)(dian)(dian)流的(de)(de)(de)(de),只需(xu)电(dian)(dian)(dian)(dian)(dian)(dian)(dian)压(ya)抵达就可(ke)以了,可(ke)以运用(yong)大电(dian)(dian)(dian)(dian)(dian)(dian)(dian)阻(zu)(zu),减少工作电(dian)(dian)(dian)(dian)(dian)(dian)(dian)流,推(tui)荐(jian)运用(yong)10K-100K左(zuo)右(you)的(de)(de)(de)(de)电(dian)(dian)(dian)(dian)(dian)(dian)(dian)阻(zu)(zu)。
P沟道MOS晶体管的空穴迁移率低,因而在MOS晶体管的几何尺寸和工作电压绝对值相等的情况下,PMOS晶体管的跨导小于N沟道MOS晶体管。此外,P沟道MOS晶体管阈值电压的绝对值普通偏高,央求有较高的工作电压。它的供电电源的电压大小和极性,与双极型晶体管——晶体管逻辑电路不兼容。PMOS因逻辑摆幅大,充电放电过程长,加之器件跨导小,所以工作速度更低,在NMOS电路(见N沟道金属—氧化物—半导体集成电路)呈现之后,多数已为NMOS电路所取代。只是,因PMOS电路工艺简单,价钱低价,有些中范围和小范围数字控制电路仍采用PMOS电路技术。
改(gai)(gai)动栅压可以改(gai)(gai)动沟(gou)道(dao)(dao)中的(de)(de)电(dian)子密度,从(cong)而改(gai)(gai)动沟(gou)道(dao)(dao)的(de)(de)电(dian)阻。这种(zhong)MOS场效(xiao)应晶(jing)体(ti)(ti)(ti)管(guan)称为P沟(gou)道(dao)(dao)增强型(xing)(xing)场效(xiao)应晶(jing)体(ti)(ti)(ti)管(guan)。假(jia)定N型(xing)(xing)硅衬底表(biao)面(mian)不加(jia)栅压就已存在P型(xing)(xing)反型(xing)(xing)层沟(gou)道(dao)(dao),加(jia)上恰当(dang)的(de)(de)偏压,可使(shi)沟(gou)道(dao)(dao)的(de)(de)电(dian)阻增大或减小(xiao)。这样的(de)(de)MOS场效(xiao)应晶(jing)体(ti)(ti)(ti)管(guan)称为P沟(gou)道(dao)(dao)耗尽(jin)型(xing)(xing)场效(xiao)应晶(jing)体(ti)(ti)(ti)管(guan)。统称为PMOS晶(jing)体(ti)(ti)(ti)管(guan)。
联系方式(shi):邹先生
手机:18123972950
QQ:2880195519
联(lian)系地址:深圳市(shi)福田区车公庙天安数码城天吉大厦CD座5C1
关注KIA半导体工程专辑请搜微(wei)信号:“KIA半导体”或点击本文下方图片扫一(yi)扫进(jin)入(ru)官(guan)方微(wei)信“关注”
长按二维码识别关(guan)注