利盈娱乐(中国)创新平台有限公司

PMOS的特性，Vgs小于一定的值就会导通，适合用于源极接VCC时的情况（高端驱动）。但是，固然PMOS可以很便当地用作高端驱动，但由于导通电阻大，价钱贵，交流种类少等缘由，在高端驱动中，通常还是运用NMOS。电路分析如下：pmos的开启条件是VGS电压为负压，并且电压的绝对值大于最低开启电压，普通小功率的PMOS管的最小开启电压为0.7V左右，假定电池充溢电，电压为4.2V,VGS=-4.2V，PMOS是导通的(de)(de)(de)，电(dian)(dian)(dian)(dian)(dian)(dian)路是(shi)没有(you)(you)问题的(de)(de)(de)。当5V电(dian)(dian)(dian)(dian)(dian)(dian)压(ya)(ya)(ya)时，G极(ji)(ji)的(de)(de)(de)电(dian)(dian)(dian)(dian)(dian)(dian)压(ya)(ya)(ya)为5V，S极(ji)(ji)的(de)(de)(de)电(dian)(dian)(dian)(dian)(dian)(dian)压(ya)(ya)(ya)为5VV-二(er)极(ji)(ji)管(guan)(guan)(guan)(guan)压(ya)(ya)(ya)降(jiang)（0.5左(zuo)右）=4.5V，PMOS管(guan)(guan)(guan)(guan)关段，当没有(you)(you)5V电(dian)(dian)(dian)(dian)(dian)(dian)压(ya)(ya)(ya)时，G极(ji)(ji)电(dian)(dian)(dian)(dian)(dian)(dian)压(ya)(ya)(ya)下(xia)(xia)拉为0V，S极(ji)(ji)的(de)(de)(de)电(dian)(dian)(dian)(dian)(dian)(dian)压(ya)(ya)(ya)为电(dian)(dian)(dian)(dian)(dian)(dian)池(chi)电(dian)(dian)(dian)(dian)(dian)(dian)压(ya)(ya)(ya)（假定电(dian)(dian)(dian)(dian)(dian)(dian)池(chi)充溢电(dian)(dian)(dian)(dian)(dian)(dian)4.2V）-MOS管(guan)(guan)(guan)(guan)未导(dao)通二(er)极(ji)(ji)管(guan)(guan)(guan)(guan)压(ya)(ya)(ya)降(jiang)（0.5V）=3.7，这(zhei)(zhei)样PMOS就(jiu)导(dao)通，二(er)极(ji)(ji)管(guan)(guan)(guan)(guan)压(ya)(ya)(ya)降(jiang)就(jiu)没有(you)(you)了这(zhei)(zhei)样VGS=-4.2V.PMOS管(guan)(guan)(guan)(guan)导(dao)通对负载供电(dian)(dian)(dian)(dian)(dian)(dian)。在这(zhei)(zhei)里用(yong)一个肖特(te)基(ji)二(er)极(ji)(ji)管(guan)(guan)(guan)(guan)（SS12）也可(ke)以(yi)处置这(zhei)(zhei)个问题，不(bu)过(guo)就(jiu)是(shi)有(you)(you)0.3V左(zuo)右的(de)(de)(de)电(dian)(dian)(dian)(dian)(dian)(dian)压(ya)(ya)(ya)降(jiang)。这(zhei)(zhei)里运用(yong)PMOS管(guan)(guan)(guan)(guan)，PMOS管(guan)(guan)(guan)(guan)完好导(dao)通，内阻(zu)比(bi)较(jiao)小，优与肖特(te)基(ji)，几乎(hu)没有(you)(you)压(ya)(ya)(ya)降(jiang)。不(bu)过(guo)下(xia)(xia)拉电(dian)(dian)(dian)(dian)(dian)(dian)阻(zu)运用(yong)的(de)(de)(de)有(you)(you)点(dian)大，驱(qu)动PMOS不(bu)需(xu)求(qiu)电(dian)(dian)(dian)(dian)(dian)(dian)流的(de)(de)(de)，只需(xu)电(dian)(dian)(dian)(dian)(dian)(dian)压(ya)(ya)(ya)抵达(da)就(jiu)可(ke)以(yi)了，可(ke)以(yi)运用(yong)大电(dian)(dian)(dian)(dian)(dian)(dian)阻(zu)，减少工(gong)作(zuo)电(dian)(dian)(dian)(dian)(dian)(dian)流，推荐运用(yong)10K-100K左(zuo)右的(de)(de)(de)电(dian)(dian)(dian)(dian)(dian)(dian)阻(zu)。

P沟道MOS晶体管的空穴迁移率低,因而在MOS晶体管的几何尺寸和工作电压绝对值相等的情况下，PMOS晶体管的跨导小于N沟道MOS晶体管。此外，P沟道MOS晶体管阈值电压的绝对值普通偏高，央求有较高的工作电压。它的供电电源的电压大小和极性,与双极型晶体管——晶体管逻辑电路不兼容。PMOS因逻辑摆幅大，充电放电过程长，加之器件跨导小，所以工作速度更低，在NMOS电路(见N沟道金属—氧化物—半导体集成电路)呈现之后，多数已为NMOS电路所取代。只是,因PMOS电路工艺简单,价钱低价，有些中范围和小范围数字控制电路仍采用PMOS电路技术。
改动栅(zha)压(ya)(ya)可以改动沟(gou)(gou)道(dao)(dao)中的(de)(de)电(dian)子密度(du)，从(cong)而改动沟(gou)(gou)道(dao)(dao)的(de)(de)电(dian)阻。这种(zhong)MOS场效(xiao)应(ying)(ying)(ying)晶体(ti)管(guan)称(cheng)为(wei)P沟(gou)(gou)道(dao)(dao)增强型(xing)(xing)场效(xiao)应(ying)(ying)(ying)晶体(ti)管(guan)。假定N型(xing)(xing)硅衬(chen)底表(biao)面(mian)不加栅(zha)压(ya)(ya)就已存在(zai)P型(xing)(xing)反型(xing)(xing)层沟(gou)(gou)道(dao)(dao)，加上恰当的(de)(de)偏压(ya)(ya)，可使沟(gou)(gou)道(dao)(dao)的(de)(de)电(dian)阻增大或减小。这样(yang)的(de)(de)MOS场效(xiao)应(ying)(ying)(ying)晶体(ti)管(guan)称(cheng)为(wei)P沟(gou)(gou)道(dao)(dao)耗尽型(xing)(xing)场效(xiao)应(ying)(ying)(ying)晶体(ti)管(guan)。统称(cheng)为(wei)PMOS晶体(ti)管(guan)。

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