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什么是pmos

在介绍PMOS管工作原理及详解(jie)时，我(wo)们先来了解(jie)一下PMOS管的(de)基本知识及符号(hao)，PMOS是指(zhi)n型衬底、p沟(gou)道，靠(kao)空穴的(de)流(liu)动运送电流(liu)的(de)MOS管。

P沟道(dao)MOS晶(jing)(jing)(jing)体(ti)(ti)(ti)管(guan)(guan)的(de)(de)空穴(xue)迁移率低，因(yin)而在MOS晶(jing)(jing)(jing)体(ti)(ti)(ti)管(guan)(guan)的(de)(de)几何尺(chi)寸和工(gong)(gong)作(zuo)电(dian)(dian)(dian)(dian)压(ya)绝对值相等的(de)(de)情况下，PMOS晶(jing)(jing)(jing)体(ti)(ti)(ti)管(guan)(guan)的(de)(de)跨导小于N沟道(dao)MOS晶(jing)(jing)(jing)体(ti)(ti)(ti)管(guan)(guan)。此外，P沟道(dao)MOS晶(jing)(jing)(jing)体(ti)(ti)(ti)管(guan)(guan)阈值电(dian)(dian)(dian)(dian)压(ya)的(de)(de)绝对值一般偏高，要求有较高的(de)(de)工(gong)(gong)作(zuo)电(dian)(dian)(dian)(dian)压(ya)。它的(de)(de)供电(dian)(dian)(dian)(dian)电(dian)(dian)(dian)(dian)源的(de)(de)电(dian)(dian)(dian)(dian)压(ya)大小和极(ji)性，与(yu)双(shuang)极(ji)型晶(jing)(jing)(jing)体(ti)(ti)(ti)管(guan)(guan)——晶(jing)(jing)(jing)体(ti)(ti)(ti)管(guan)(guan)逻辑电(dian)(dian)(dian)(dian)路不(bu)兼容。PMOS因(yin)逻辑摆(bai)幅大，充电(dian)(dian)(dian)(dian)放电(dian)(dian)(dian)(dian)过程长，加之(zhi)器件跨导小，所以工(gong)(gong)作(zuo)速(su)度更低，在NMOS电(dian)(dian)(dian)(dian)路（见(jian)N沟道(dao)金属(shu)—氧化物—半导体(ti)(ti)(ti)集成电(dian)(dian)(dian)(dian)路）出现之(zhi)后，多数已为NMOS电(dian)(dian)(dian)(dian)路所取代。只是，因(yin)PMOS电(dian)(dian)(dian)(dian)路工(gong)(gong)艺简单，价(jia)格便宜，有些中规模和小规模数字控制电(dian)(dian)(dian)(dian)路仍(reng)采用PMOS电(dian)(dian)(dian)(dian)路技术。

pmos管工作原理及详解

金属氧化物半导(dao)体(ti)(ti)场(chang)效(xiao)应(ying)(MOS)晶体(ti)(ti)管(guan)(guan)可(ke)(ke)分为(wei)N沟(gou)(gou)(gou)(gou)道(dao)(dao)与P沟(gou)(gou)(gou)(gou)道(dao)(dao)两(liang)大类(lei), P沟(gou)(gou)(gou)(gou)道(dao)(dao)硅(gui)MOS 场(chang)效(xiao)应(ying)晶体(ti)(ti)管(guan)(guan)在N型(xing)(xing)硅(gui)衬底上(shang)有(you)两(liang)个P+区(qu),分别叫做(zuo)源(yuan)极(ji)和漏极(ji),两(liang)极(ji)之间不(bu)通导(dao),柵极(ji)上(shang)加有(you)足够的正(zheng)电压(ya)(源(yuan)极(ji)接地)时,柵极(ji)下的N型(xing)(xing)硅(gui)表(biao)面呈(cheng)现P型(xing)(xing)反型(xing)(xing)层,成(cheng)为(wei)连接源(yuan)极(ji)和漏极(ji)的沟(gou)(gou)(gou)(gou)道(dao)(dao)。改(gai)变栅压(ya)可(ke)(ke)以改(gai)变沟(gou)(gou)(gou)(gou)道(dao)(dao)中的电子密度,从而改(gai)变沟(gou)(gou)(gou)(gou)道(dao)(dao)的电阻。这(zhei)种(zhong)MOS场(chang)效(xiao)应(ying)晶体(ti)(ti)管(guan)(guan)称(cheng)为(wei)P沟(gou)(gou)(gou)(gou)道(dao)(dao)增(zeng)强型(xing)(xing)场(chang)效(xiao)应(ying)晶体(ti)(ti)管(guan)(guan)。如果(guo)N型(xing)(xing)硅(gui)衬底表(biao)面不(bu)加栅压(ya)就已存在P型(xing)(xing)反型(xing)(xing)层沟(gou)(gou)(gou)(gou)道(dao)(dao),加上(shang)适当的偏(pian)压(ya),可(ke)(ke)使沟(gou)(gou)(gou)(gou)道(dao)(dao)的电阻增(zeng)大或减小。这(zhei)样的MOS场(chang)效(xiao)应(ying)晶体(ti)(ti)管(guan)(guan)称(cheng)为(wei)P沟(gou)(gou)(gou)(gou)道(dao)(dao)耗尽型(xing)(xing)场(chang)效(xiao)应(ying)晶体(ti)(ti)管(guan)(guan)。统称(cheng)为(wei)PMOS晶体(ti)(ti)管(guan)(guan)。

P沟(gou)(gou)道(dao)MOS晶体(ti)管(guan)(guan)(guan)的(de)(de)空(kong)穴迁(qian)移率(lv)低,因而在MOS晶体(ti)管(guan)(guan)(guan)的(de)(de)几何尺(chi)寸和(he)工作(zuo)(zuo)电(dian)(dian)(dian)(dian)(dian)压(ya)绝(jue)对(dui)值(zhi)相(xiang)等(deng)的(de)(de)情(qing)况下,PMOS晶体(ti)管(guan)(guan)(guan)的(de)(de)跨导小(xiao)于(yu)N沟(gou)(gou)道(dao)MOS晶体(ti)管(guan)(guan)(guan)。此(ci)外,P沟(gou)(gou)道(dao)MOS晶体(ti)管(guan)(guan)(guan)阈值(zhi)电(dian)(dian)(dian)(dian)(dian)压(ya)的(de)(de)绝(jue)对(dui)值(zhi)一(yi)般(ban)偏(pian)高,要求有(you)较高的(de)(de)工作(zuo)(zuo)电(dian)(dian)(dian)(dian)(dian)压(ya)。它的(de)(de)供电(dian)(dian)(dian)(dian)(dian)电(dian)(dian)(dian)(dian)(dian)源的(de)(de)电(dian)(dian)(dian)(dian)(dian)压(ya)大小(xiao)和(he)极性,与(yu)双极型晶体(ti)管(guan)(guan)(guan)——晶体(ti)管(guan)(guan)(guan)逻辑电(dian)(dian)(dian)(dian)(dian)路不(bu)兼容(rong)。PMOS因逻辑摆幅大,充(chong)电(dian)(dian)(dian)(dian)(dian)放(fang)电(dian)(dian)(dian)(dian)(dian)过(guo)程长,加之器件跨导小(xiao),所(suo)以工作(zuo)(zuo)速度更低,在NMOS电(dian)(dian)(dian)(dian)(dian)路(见N沟(gou)(gou)道(dao)金属(shu)—氧化(hua)物(wu)—半导体(ti)集成电(dian)(dian)(dian)(dian)(dian)路)出(chu)现(xian)之后(hou),多数已为NMOS电(dian)(dian)(dian)(dian)(dian)路所(suo)取代。只是(shi)(shi),因PMOS电(dian)(dian)(dian)(dian)(dian)路工艺(yi)简单,价格便(bian)宜,有(you)些中(zhong)规(gui)模和(he)小(xiao)规(gui)模数字控制电(dian)(dian)(dian)(dian)(dian)路仍采用(yong)PMOS电(dian)(dian)(dian)(dian)(dian)路技术。PMOS的(de)(de)特性,Vgs小(xiao)于(yu)一(yi)定的(de)(de)值(zhi)就会导通,适合(he)用(yong)于(yu)源极接VCC时的(de)(de)情(qing)况(高端(duan)驱(qu)(qu)动)。但是(shi)(shi),虽然PMOS可以很方便(bian)地(di)用(yong)作(zuo)(zuo)高端(duan)驱(qu)(qu)动,但由于(yu)导通电(dian)(dian)(dian)(dian)(dian)阻大,价格贵(gui),替换种(zhong)类少等(deng)原因,在高端(duan)驱(qu)(qu)动中(zhong),通常还是(shi)(shi)使用(yong)NMOS。

正常工作时,P沟道(dao)增(zeng)强型MOS管(guan)的(de)衬底(di)必(bi)须与源极(ji)相连,而(er)漏心极(ji)的(de)电压Vds应为负(fu)值,以保证两个P区与衬底(di)之(zhi)间的(de)PN结均为反偏,同时为了在衬底(di)顶表面附(fu)近形(xing)成导电沟道(dao),栅极(ji)对源极(ji)的(de)电压Vgs也应为负(fu)。

1.导电沟道的形成(V ds=0)

当(dang)Vds=0时(shi)(shi),在(zai)栅(zha)源之(zhi)间加(jia)(jia)(jia)负(fu)(fu)电(dian)(dian)压Vgs,由于绝缘层(ceng)的(de)(de)(de)(de)存在(zai),故没有电(dian)(dian)流,但是金属栅(zha)极被补充电(dian)(dian)而聚集(ji)负(fu)(fu)电(dian)(dian)荷,N型(xing)(xing)半(ban)导(dao)体中(zhong)的(de)(de)(de)(de)多子(zi)电(dian)(dian)子(zi)被负(fu)(fu)电(dian)(dian)荷排斥(chi)向体内运动(dong),表(biao)面(mian)留下(xia)带正电(dian)(dian)的(de)(de)(de)(de)离(li)子(zi),形(xing)成(cheng)耗(hao)尽(jin)(jin)层(ceng),随着G、S间负(fu)(fu)电(dian)(dian)压的(de)(de)(de)(de)增加(jia)(jia)(jia),耗(hao)尽(jin)(jin)层(ceng)加(jia)(jia)(jia)宽(kuan),当(dang)Vgs增大到一定值(zhi)时(shi)(shi),衬底中(zhong)的(de)(de)(de)(de)空(kong)穴(少子(zi))被栅(zha)极中(zhong)的(de)(de)(de)(de)负(fu)(fu)电(dian)(dian)荷吸引到表(biao)面(mian),在(zai)耗(hao)尽(jin)(jin)层(ceng)和绝缘层(ceng)之(zhi)间形(xing)成(cheng)一个(ge)P型(xing)(xing)薄层(ceng),称(cheng)(cheng)反(fan)型(xing)(xing)层(ceng),这(zhei)个(ge)反(fan)型(xing)(xing)层(ceng)就构成(cheng)漏源之(zhi)间的(de)(de)(de)(de)导(dao)电(dian)(dian)沟道(dao),这(zhei)时(shi)(shi)的(de)(de)(de)(de)V gs称(cheng)(cheng)为开启电(dian)(dian)压Vgs(th),Vgs到Vgs(th)后再增加(jia)(jia)(jia),衬底表(biao)面(mian)感应的(de)(de)(de)(de)空(kong)穴越多,反(fan)型(xing)(xing)层(ceng)加(jia)(jia)(jia)宽(kuan),而耗(hao)尽(jin)(jin)层(ceng)的(de)(de)(de)(de)宽(kuan)度却不再变化,这(zhei)样(yang)我们可以(yi)用Vgs的(de)(de)(de)(de)大小控(kong)制导(dao)电(dian)(dian)沟道(dao)的(de)(de)(de)(de)宽(kuan)度。

2.V ds≠O的情况

导电沟(gou)道(dao)(dao)形成以后(hou),D,S间(jian)加(jia)负向(xiang)电压(ya)时,那么在源(yuan)极(ji)(ji)与漏(lou)极(ji)(ji)之间(jian)将(jiang)有漏(lou)极(ji)(ji)电流I d 流通,而且I d随(sui)Vds而增(zeng)加(jia).I d沿沟(gou)道(dao)(dao)产(chan)生的压(ya)降使(shi)沟(gou)道(dao)(dao)上各点与栅极(ji)(ji)间(jian)的电压(ya)不再相等,该电压(ya)削(xue)弱(ruo)了(le)栅极(ji)(ji)中负电荷电场的作用,使(shi)沟(gou)道(dao)(dao)从漏(lou)极(ji)(ji)到(dao)源(yuan)极(ji)(ji)逐渐变窄.当V ds增(zeng)大到(dao)使(shi)V gd=V gs(TH),沟(gou)道(dao)(dao)在漏(lou)极(ji)(ji)附近出(chu)现预(yu)夹断.

MOS管种类和结构

MOSFET管(guan)(guan)是FET的(de)(de)(de)(de)一(yi)(yi)种(zhong)（另一(yi)(yi)种(zhong)是JFET），可以(yi)被制造(zao)成(cheng)增强(qiang)型(xing)(xing)(xing)或(huo)耗(hao)尽(jin)型(xing)(xing)(xing)，P沟道或(huo)N沟道共(gong)4种(zhong)类型(xing)(xing)(xing)，但(dan)实际应用(yong)(yong)的(de)(de)(de)(de)只(zhi)有(you)(you)增强(qiang)型(xing)(xing)(xing)的(de)(de)(de)(de)N沟道MOS管(guan)(guan)型(xing)(xing)(xing)号(hao)和(he)(he)增强(qiang)型(xing)(xing)(xing)的(de)(de)(de)(de)P沟道MOS管(guan)(guan)型(xing)(xing)(xing)号(hao)，所以(yi)通常提(ti)到NMOS，或(huo)者PMOS指的(de)(de)(de)(de)就是这两(liang)种(zhong)。至(zhi)于为(wei)什么不(bu)使(shi)用(yong)(yong)耗(hao)尽(jin)型(xing)(xing)(xing)的(de)(de)(de)(de)MOS管(guan)(guan)，不(bu)建议刨(bao)根问底。对于这两(liang)种(zhong)增强(qiang)型(xing)(xing)(xing)MOS管(guan)(guan)，比较常用(yong)(yong)的(de)(de)(de)(de)是NMOS。原(yuan)因是导(dao)通电(dian)阻小，且容易制造(zao)。所以(yi)开关电(dian)源和(he)(he)马达驱动的(de)(de)(de)(de)应用(yong)(yong)中，一(yi)(yi)般都用(yong)(yong)NMOS。下面的(de)(de)(de)(de)介(jie)绍中，也多以(yi)NMOS为(wei)主(zhu)。 MOS管(guan)(guan)的(de)(de)(de)(de)三个(ge)管(guan)(guan)脚之(zhi)间有(you)(you)寄(ji)生电(dian)容存(cun)在(zai)(zai)，这不(bu)是我们需要的(de)(de)(de)(de)，而是由于制造(zao)工(gong)艺(yi)限制产生的(de)(de)(de)(de)。寄(ji)生电(dian)容的(de)(de)(de)(de)存(cun)在(zai)(zai)使(shi)得在(zai)(zai)设计(ji)或(huo)选择驱动电(dian)路(lu)的(de)(de)(de)(de)时候要麻(ma)烦一(yi)(yi)些，但(dan)没有(you)(you)办法避免，后边再详细(xi)介(jie)绍。在(zai)(zai)MOS管(guan)(guan)原(yuan)理(li)图上可以(yi)看到，漏极(ji)和(he)(he)源极(ji)之(zhi)间有(you)(you)一(yi)(yi)个(ge)寄(ji)生二(er)极(ji)管(guan)(guan)。这个(ge)叫体二(er)极(ji)管(guan)(guan)，在(zai)(zai)驱动感性负(fu)载，这个(ge)二(er)极(ji)管(guan)(guan)很重要。顺便说一(yi)(yi)句，体二(er)极(ji)管(guan)(guan)只(zhi)在(zai)(zai)单个(ge)的(de)(de)(de)(de)MOS管(guan)(guan)中存(cun)在(zai)(zai)，在(zai)(zai)集成(cheng)电(dian)路(lu)芯片内部通常是没有(you)(you)的(de)(de)(de)(de)。

MOS管导通特性

导通(tong)的意(yi)思是作为(wei)开关(guan)，相当于开关(guan)闭合(he)(he)。NMOS的特性(xing)，Vgs大于一定的值就会导通(tong)，适合(he)(he)用(yong)于源极(ji)接(jie)地时的情况（低端(duan)(duan)(duan)驱(qu)(qu)动(dong)），只要栅极(ji)电压(ya)达(da)到4V或10V就可(ke)以了。PMOS的特性(xing)，Vgs小于一定的值就会导通(tong)，适合(he)(he)用(yong)于源极(ji)接(jie)VCC时的情况（高(gao)端(duan)(duan)(duan)驱(qu)(qu)动(dong)）。但(dan)是，虽然PMOS可(ke)以很(hen)方便地用(yong)作高(gao)端(duan)(duan)(duan)驱(qu)(qu)动(dong)，但(dan)由于导通(tong)电阻大，价格(ge)贵，替换种类(lei)少等原因，在(zai)高(gao)端(duan)(duan)(duan)驱(qu)(qu)动(dong)中，通(tong)常还是使用(yong)NMOS。

MOS开关管损失

不(bu)管(guan)(guan)是NMOS还是PMOS，导(dao)(dao)通(tong)(tong)(tong)(tong)(tong)后都有(you)(you)导(dao)(dao)通(tong)(tong)(tong)(tong)(tong)电(dian)(dian)阻存在(zai)(zai)(zai)(zai)(zai)，这(zhei)样电(dian)(dian)流(liu)就会在(zai)(zai)(zai)(zai)(zai)这(zhei)个电(dian)(dian)阻上消耗(hao)(hao)能量，这(zhei)部(bu)分消耗(hao)(hao)的(de)能量叫做(zuo)导(dao)(dao)通(tong)(tong)(tong)(tong)(tong)损(sun)(sun)(sun)(sun)耗(hao)(hao)。选(xuan)择导(dao)(dao)通(tong)(tong)(tong)(tong)(tong)电(dian)(dian)阻小(xiao)的(de)MOS管(guan)(guan)会减(jian)小(xiao)导(dao)(dao)通(tong)(tong)(tong)(tong)(tong)损(sun)(sun)(sun)(sun)耗(hao)(hao)。现在(zai)(zai)(zai)(zai)(zai)的(de)小(xiao)功率(lv)MOS管(guan)(guan)导(dao)(dao)通(tong)(tong)(tong)(tong)(tong)电(dian)(dian)阻一(yi)般在(zai)(zai)(zai)(zai)(zai)几十(shi)毫(hao)欧(ou)左右(you)，几毫(hao)欧(ou)的(de)也(ye)有(you)(you)。MOS在(zai)(zai)(zai)(zai)(zai)导(dao)(dao)通(tong)(tong)(tong)(tong)(tong)和截止的(de)时(shi)(shi)候，一(yi)定不(bu)是在(zai)(zai)(zai)(zai)(zai)瞬间(jian)(jian)完成的(de)。MOS两端(duan)的(de)电(dian)(dian)压(ya)有(you)(you)一(yi)个下降的(de)过程，流(liu)过的(de)电(dian)(dian)流(liu)有(you)(you)一(yi)个上升(sheng)的(de)过程，在(zai)(zai)(zai)(zai)(zai)这(zhei)段时(shi)(shi)间(jian)(jian)内，MOS管(guan)(guan)的(de)损(sun)(sun)(sun)(sun)失(shi)是电(dian)(dian)压(ya)和电(dian)(dian)流(liu)的(de)乘积(ji)，叫做(zuo)开(kai)关(guan)(guan)(guan)损(sun)(sun)(sun)(sun)失(shi)。通(tong)(tong)(tong)(tong)(tong)常开(kai)关(guan)(guan)(guan)损(sun)(sun)(sun)(sun)失(shi)比导(dao)(dao)通(tong)(tong)(tong)(tong)(tong)损(sun)(sun)(sun)(sun)失(shi)大(da)(da)得多，而且开(kai)关(guan)(guan)(guan)频(pin)率(lv)越(yue)快，损(sun)(sun)(sun)(sun)失(shi)也(ye)越(yue)大(da)(da)。导(dao)(dao)通(tong)(tong)(tong)(tong)(tong)瞬间(jian)(jian)电(dian)(dian)压(ya)和电(dian)(dian)流(liu)的(de)乘积(ji)很(hen)大(da)(da)，造成的(de)损(sun)(sun)(sun)(sun)失(shi)也(ye)就很(hen)大(da)(da)。缩短开(kai)关(guan)(guan)(guan)时(shi)(shi)间(jian)(jian)，可以(yi)减(jian)小(xiao)每次导(dao)(dao)通(tong)(tong)(tong)(tong)(tong)时(shi)(shi)的(de)损(sun)(sun)(sun)(sun)失(shi)；降低开(kai)关(guan)(guan)(guan)频(pin)率(lv)，可以(yi)减(jian)小(xiao)单位时(shi)(shi)间(jian)(jian)内的(de)开(kai)关(guan)(guan)(guan)次数(shu)。这(zhei)两种办法都可以(yi)减(jian)小(xiao)开(kai)关(guan)(guan)(guan)损(sun)(sun)(sun)(sun)失(shi)。

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